80
µm deep Si etching (ICP65)
The etch groove shape is smooth and adapted for inserting fibers into
DWDM chips.
low temperature process at - 110°C
etch rate: 5 µm/ min
selectivity Si/SiO2 55 : 1
uniformity: +/- 4 % across wafer |
50 µm deep Si etching (ICP65)
Variant of coupling groove with strictly vertical walls |
The waveguide structure:
lower cladding 5 µm SiO2
core SiON: d=2.5 µm
RI difference 1.5 %
upper cladding 5 µm SiO2
deposition rate: 70 nm/min
RI uniformity: <+/- 0.05 % (measured applying prism coupling)
thickness uniformity: <+/-1.0 % |
Infrared
camera images of 8-channel DWDM outputs
Crosstalks: –10dB |